CoSy Express

Compiler generation made easy for architecture designers

Architecture-compiler exploration

  • Accessible for architecture designers
  • Minimizing time-to-robustness and time-to-market
  • Maximizing architecture exploration flexibility
  • Smooth upgrade path to CoSy for best-in-class compiler development

OEM Compiler Technology

CoSy Express is a novel OEM compiler generator technology from ACE that opens up new possibilities for architecture designers to quickly create optimizing compilers for new processor architectures. CoSy Express is derived from the well-established and comprehensive CoSy compiler development system, which is used by compiler engineers worldwide to develop best-in-class compilers for a wide range of processor architectures. Whereas CoSy is fully geared to satisfy the needs and requirements of the compiler expert, CoSy Express streamlines rapid compiler generation by delivering the architecture specific power of CoSy to architecture designers and users of configurable processors. As such, CoSy Express is a unique compiler generation technology aimed at integration with hardware/software modeling & design tools and the incorporation of advanced compiler generator technology into compilers for configurable processors.

For HW/SW co-design tools

The new integrated hardware/software modelling & design tools that are entering the EDA market, enable a new breed of embedded systems developers to design custom (co-) processors. Such HW/SW co-design tools offer support for generating assembler, simulator and debugger tools, based upon a single architecture description. While this contributes to putting the newly designed processor to the test in a short time frame, the validation of its effectiveness in the intended application domain really should include the specific application code being processed by a dedicated, optimizing compiler. Aimed at integration with these HW/SW design tools, CoSy Express enables semi-automated generation of optimizing compilers based upon a single architecture description. This means that architecture designers can efficiently develop new processors and the complete software tool chain in one streamlined effort. Apart from the obvious time and cost benefit, this opens up unique possibilities to test the effectiveness of the new processor with compiled code from the application domain and to make adaptations early in the design stage.

Closed loop design cycle

Design parameters:
  • Integer size
  • Register file
  • Data path width
  • Number of bits for encoding immediate values
  • Number of bits for register addresses
  • Memory/stack/cache size
  • Pipeline depth
  • Number of ALU's
  • Special purpose units (MAC, FPU, ...)

With CoSy Express technology fully integrated in a System Level Design environment, an initial, validating compiler can be produced within a 1-4 weeks' time frame. The effort for creating a new compiler with CoSy Express is typically limited to describing the compiler's code generator, where the connection is made between C-language construct rules and the instruction set already defined in the HW modeling stage. From this point, exploration of the architecture-compiler-application play field can commence with a series of what-if scenario experiments. CoSy Express rapidly generates an optimizing compiler for each different architecture configuration. Based upon the application code performance data for the different compiler/architecture combinations, conclusions can be drawn about the effectiveness of hardware options.

(Re-) configurable processor compilers

The new flexible, reconfigurable processor architectures that are becoming available on the market, typically offer the solid foundation of a well-defined processor core, combined with the wealth of hardware functions that can be selected as appropriate. Based upon the CoSy Express compiler generation technology, vendors of configurable processors can now provide their users with optimizing compilers that can adapt to the specific configuration of the processor. More precisely, CoSy Express enables end users of flexible architectures to instantly generate their own specific optimizing compiler and explore the optimal architecture-compiler configuration for the specific application domain.

Packaging & Availability

CoSy Express technology is based upon the licensable CoSy compiler generator system from ACE Associated Compiler Experts. A dedicated CoSy Express Generator package enabling CoSy licensees to generate specific instances of CoSy Express compiler generators for OEM integration with HW/SW co-design tools, or configurable processor architectures, is available in conjunction with CoSy.

Supported Host platforms

The CoSy compiler development system and the CoSy Express Generator package are available in binary and full source versions, for development systems running Solaris, and Linux, to generate compilers and cross compilers for a variety of architectures and platforms including Windows.

Contact ACE

If you are interested in more details about using CoSy Express technology and expanding your product offering with professional compiler generation, then do not hesitate to contact us or fill out the web-request form.

CoSy is registered trademark of ACE Associated Computer Experts bv. CoSy Express is trademark of ACE Associated Computer Experts bv.